update readme

examples/DoReFa-Net/README.md

@@ -2,7 +2,7 @@ Code and model for the paper:
 
 [DoReFa-Net: Training Low Bitwidth Convolutional Neural Networks with Low Bitwidth Gradients](http://arxiv.org/abs/1606.06160), by Zhou et al.
 
-We hosted a demo at CVPR16 on behalf of Megvii, Inc, running real-time 1/4 VGG size DoReFa-Net on both ARM and FPGA.
+We hosted a demo at CVPR16 on behalf of Megvii, Inc, running a real-time 1/4-VGG size DoReFa-Net on ARM and half-VGG size DoReFa-Net on FPGA.
 We're not planning to release those runtime bit-op libraries for now. In these examples, bit operations are run in float32.
 
 Pretrained model for 1-2-6-AlexNet is available at

tensorpack/predict/concurrency.py

@@ -127,6 +127,7 @@ class MultiThreadAsyncPredictor(AsyncPredictorBase):
     """
     def __init__(self, predictors, batch_size=5):
         """ :param predictors: a list of OnlinePredictor"""
+        assert len(predictors)
         for k in predictors:
             #assert isinstance(k, OnlinePredictor), type(k)
             # TODO use predictors.return_input here