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Shashank Suhas
seminar-breakout
Commits
4071cbec
Commit
4071cbec
authored
Jun 22, 2016
by
Yuxin Wu
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9908baa2
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examples/DoReFa-Net/README.md
examples/DoReFa-Net/README.md
+15
-1
examples/mnist-convnet.py
examples/mnist-convnet.py
+5
-8
No files found.
examples/DoReFa-Net/README.md
View file @
4071cbec
...
...
@@ -10,7 +10,7 @@ To use the script. You'll need:
+
[
TensorFlow
](
https://tensorflow.org
)
>= 0.8
+
OpenCV
B
indings for Python
+
OpenCV
b
indings for Python
+
[
tensorpack
](
https://github.com/ppwwyyxx/tensorpack
)
:
...
...
@@ -46,3 +46,17 @@ To eval on ILSVRC12, `path/to/ILSVRC12` must have a subdirectory named 'val' con
Please use
[
github issues
](
https://github.com/ppwwyyxx/tensorpack/issues
)
for any issues related to the code.
Send email to the authors for other questions related to the paper.
## Citation
If you use our models in your research, please cite:
```
@article{zhou2016dorefa,
author = {Shuchang Zhou and Zekun Ni and Xinyu Zhou and He Wen and Yuxin Wu and Yuheng Zou},
title = {DoReFa-Net: Training Low Bitwidth Convolutional Neural Networks with Low Bitwidth Gradients},
journal = {CoRR},
volume = {abs/1606.06160},
year = {2016},
url = {http://arxiv.org/abs/1606.06160},
}
```
examples/mnist-convnet.py
View file @
4071cbec
...
...
@@ -107,12 +107,9 @@ if __name__ == '__main__':
args
=
parser
.
parse_args
()
if
args
.
gpu
:
os
.
environ
[
'CUDA_VISIBLE_DEVICES'
]
=
args
.
gpu
else
:
os
.
environ
[
'CUDA_VISIBLE_DEVICES'
]
=
'0'
with
tf
.
Graph
()
.
as_default
():
config
=
get_config
()
if
args
.
load
:
config
.
session_init
=
SaverRestore
(
args
.
load
)
QueueInputTrainer
(
config
)
.
train
()
config
=
get_config
()
if
args
.
load
:
config
.
session_init
=
SaverRestore
(
args
.
load
)
QueueInputTrainer
(
config
)
.
train
()
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