Commit 27aaf9df authored by Bruce Momjian's avatar Bruce Momjian

Remove ; and add \n to ASM code.

parent b864793e
...@@ -8,7 +8,7 @@ ...@@ -8,7 +8,7 @@
* *
* *
* IDENTIFICATION * IDENTIFICATION
* $Header: /cvsroot/pgsql/src/backend/storage/buffer/Attic/s_lock.c,v 1.29 2001/01/14 05:08:15 tgl Exp $ * $Header: /cvsroot/pgsql/src/backend/storage/buffer/Attic/s_lock.c,v 1.30 2001/01/19 20:39:16 momjian Exp $
* *
*------------------------------------------------------------------------- *-------------------------------------------------------------------------
*/ */
...@@ -115,9 +115,6 @@ s_lock(volatile slock_t *lock, const char *file, const int line) ...@@ -115,9 +115,6 @@ s_lock(volatile slock_t *lock, const char *file, const int line)
} }
} }
/* /*
* Various TAS implementations that cannot live in s_lock.h as no inline * Various TAS implementations that cannot live in s_lock.h as no inline
* definition exists (yet). * definition exists (yet).
...@@ -136,18 +133,18 @@ static void ...@@ -136,18 +133,18 @@ static void
tas_dummy() /* really means: extern int tas(slock_t tas_dummy() /* really means: extern int tas(slock_t
* **lock); */ * **lock); */
{ {
__asm__(" \n\ __asm__ __volatile__(
.global _tas \n\ "\
_tas: \n\ .global _tas \n\
movel sp@(0x4),a0 \n\ _tas: \n\
tas a0@ \n\ movel sp@(0x4),a0 \n\
beq _success \n\ tas a0@ \n\
moveq #-128,d0 \n\ beq _success \n\
rts \n\ moveq #-128,d0 \n\
_success: \n\ rts \n\
moveq #0,d0 \n\ _success: \n\
rts \n\ moveq #0,d0 \n\
"); rts");
} }
#endif /* __m68k__ */ #endif /* __m68k__ */
...@@ -160,22 +157,23 @@ _success: \n\ ...@@ -160,22 +157,23 @@ _success: \n\
static void static void
tas_dummy() tas_dummy()
{ {
__asm__(" \n\ __asm__ __volatile__(
.globl tas \n\ "\
.globl _tas \n\ .globl tas \n\
_tas: \n\ .globl _tas \n\
tas: \n\ _tas: \n\
lwarx r5,0,r3 \n\ tas: \n\
cmpwi r5,0 \n\ lwarx r5,0,r3 \n\
bne fail \n\ cmpwi r5,0 \n\
addi r5,r5,1 \n\ bne fail \n\
stwcx. r5,0,r3 \n\ addi r5,r5,1 \n\
beq success \n\ stwcx. r5,0,r3 \n\
fail: li r3,1 \n\ beq success \n\
blr \n\ fail: li r3,1 \n\
success: \n\ blr \n\
li r3,0 \n\ success: \n\
blr \n\ li r3,0 \n\
blr \n\
"); ");
} }
...@@ -186,21 +184,21 @@ success: \n\ ...@@ -186,21 +184,21 @@ success: \n\
static void static void
tas_dummy() tas_dummy()
{ {
__asm__(" \n\ __asm__ __volatile__(
.global tas \n\ "\
tas: \n\ .global tas \n\
lwarx 5,0,3 \n\ tas: \n\
cmpwi 5,0 \n\ lwarx 5,0,3 \n\
bne fail \n\ cmpwi 5,0 \n\
addi 5,5,1 \n\ bne fail \n\
stwcx. 5,0,3 \n\ addi 5,5,1 \n\
beq success \n\ stwcx. 5,0,3 \n\
fail: li 3,1 \n\ beq success \n\
blr \n\ fail: li 3,1 \n\
success: \n\ blr \n\
li 3,0 \n\ success: \n\
blr \n\ li 3,0 \n\
"); blr");
} }
#endif /* __powerpc__ */ #endif /* __powerpc__ */
...@@ -209,22 +207,22 @@ success: \n\ ...@@ -209,22 +207,22 @@ success: \n\
static void static void
tas_dummy() tas_dummy()
{ {
__asm__(" \n\ __asm__ _volatile__(
.global tas \n\ "\
tas: \n\ .global tas \n\
.frame $sp, 0, $31 \n\ tas: \n\
ll $14, 0($4) \n\ .frame $sp, 0, $31 \n\
or $15, $14, 1 \n\ ll $14, 0($4) \n\
sc $15, 0($4) \n\ or $15, $14, 1 \n\
beq $15, 0, fail \n\ sc $15, 0($4) \n\
bne $14, 0, fail \n\ beq $15, 0, fail\n\
li $2, 0 \n\ bne $14, 0, fail\n\
.livereg 0x2000FF0E,0x00000FFF \n\ li $2, 0 \n\
j $31 \n\ .livereg 0x2000FF0E,0x00000FFF \n\
fail: \n\ j $31 \n\
li $2, 1 \n\ fail: \n\
j $31 \n\ li $2, 1 \n\
"); j $31");
} }
#endif /* __mips__ */ #endif /* __mips__ */
......
...@@ -9,7 +9,7 @@ ...@@ -9,7 +9,7 @@
* *
* *
* IDENTIFICATION * IDENTIFICATION
* $Header: /cvsroot/pgsql/src/include/storage/s_lock.h,v 1.82 2001/01/19 07:03:53 momjian Exp $ * $Header: /cvsroot/pgsql/src/include/storage/s_lock.h,v 1.83 2001/01/19 20:39:16 momjian Exp $
* *
*------------------------------------------------------------------------- *-------------------------------------------------------------------------
*/ */
...@@ -103,9 +103,9 @@ extern void s_lock_sleep(unsigned spins, int microsec, ...@@ -103,9 +103,9 @@ extern void s_lock_sleep(unsigned spins, int microsec,
* Standard _asm format: * Standard _asm format:
* *
* __asm__ __volatile__( * __asm__ __volatile__(
* "command;" * "command \n"
* "command;" * "command \n"
* "command;" * "command \n"
* : "=r"(_res) return value, in register * : "=r"(_res) return value, in register
* : "r"(lock) argument, 'lock pointer', in register * : "r"(lock) argument, 'lock pointer', in register
* : "r0"); inline code uses this register * : "r0"); inline code uses this register
...@@ -121,8 +121,8 @@ tas(volatile slock_t *lock) ...@@ -121,8 +121,8 @@ tas(volatile slock_t *lock)
register slock_t _res = 1; register slock_t _res = 1;
__asm__ __volatile__( __asm__ __volatile__(
"lock;" "lock \n"
"xchgb %0,%1;" "xchgb %0,%1 \n"
: "=q"(_res), "=m"(*lock) : "=q"(_res), "=m"(*lock)
: "0"(_res)); : "0"(_res));
return (int) _res; return (int) _res;
...@@ -140,7 +140,7 @@ tas(volatile slock_t *lock) ...@@ -140,7 +140,7 @@ tas(volatile slock_t *lock)
long int ret; long int ret;
__asm__ __volatile__( __asm__ __volatile__(
"xchg4 %0=%1,%2;" "xchg4 %0=%1,%2 \n"
: "=r"(ret), "=m"(*lock) : "=r"(ret), "=m"(*lock)
: "r"(1), "1"(*lock) : "r"(1), "1"(*lock)
: "memory"); : "memory");
...@@ -160,7 +160,7 @@ tas(volatile slock_t *lock) ...@@ -160,7 +160,7 @@ tas(volatile slock_t *lock)
register slock_t _res = 1; register slock_t _res = 1;
__asm__ __volatile__( __asm__ __volatile__(
"swpb %0, %0, [%3];" "swpb %0, %0, [%3] \n"
: "=r"(_res), "=m"(*lock) : "=r"(_res), "=m"(*lock)
: "0"(_res), "r"(lock)); : "0"(_res), "r"(lock));
return (int) _res; return (int) _res;
...@@ -180,11 +180,11 @@ tas(volatile slock_t *lock) ...@@ -180,11 +180,11 @@ tas(volatile slock_t *lock)
int _res; int _res;
__asm__ __volatile__( __asm__ __volatile__(
"la 1,1;" "la 1,1 \n"
"l 2,%2;" "l 2,%2 \n"
"slr 0,0;" "slr 0,0 \n"
"cs 0,1,0(2);" "cs 0,1,0(2) \n"
"lr %1,0;" "lr %1,0 \n"
: "=m"(lock), "=d"(_res) : "=m"(lock), "=d"(_res)
: "m"(lock) : "m"(lock)
: "0", "1", "2"); : "0", "1", "2");
...@@ -204,7 +204,7 @@ tas(volatile slock_t *lock) ...@@ -204,7 +204,7 @@ tas(volatile slock_t *lock)
register slock_t _res = 1; register slock_t _res = 1;
__asm__ __volatile__( __asm__ __volatile__(
"ldstub [%2], %0;" "ldstub [%2], %0 \n"
: "=r"(_res), "=m"(*lock) : "=r"(_res), "=m"(*lock)
: "r"(lock)); : "r"(lock));
return (int) _res; return (int) _res;
...@@ -222,8 +222,8 @@ tas(volatile slock_t *lock) ...@@ -222,8 +222,8 @@ tas(volatile slock_t *lock)
register int rv; register int rv;
__asm__ __volatile__( __asm__ __volatile__(
"tas %1;" "tas %1 \n"
"sne %0;" "sne %0 \n"
: "=d"(rv), "=m"(*lock) : "=d"(rv), "=m"(*lock)
: "1"(*lock) : "1"(*lock)
: "cc"); : "cc");
...@@ -249,10 +249,10 @@ tas(volatile slock_t *lock) ...@@ -249,10 +249,10 @@ tas(volatile slock_t *lock)
register _res; register _res;
__asm__ __volatile__( __asm__ __volatile__(
"movl $1, r0;" "movl $1, r0 \n"
"bbssi $0, (%1), 1f;" "bbssi $0, (%1), 1f \n"
"clrl r0;" "clrl r0 \n"
"1: movl r0, %0;" "1: movl r0, %0 \n"
: "=r"(_res) : "=r"(_res)
: "r"(lock) : "r"(lock)
: "r0"); : "r0");
...@@ -271,8 +271,8 @@ tas(volatile slock_t *lock) ...@@ -271,8 +271,8 @@ tas(volatile slock_t *lock)
register _res; register _res;
__asm__ __volatile__( __asm__ __volatile__(
"sbitb 0, %0;" "sbitb 0, %0 \n"
"sfsd %1;" "sfsd %1 \n"
: "=m"(*lock), "=r"(_res)); : "=m"(*lock), "=r"(_res));
return (int) _res; return (int) _res;
} }
...@@ -339,16 +339,16 @@ tas(volatile slock_t *lock) ...@@ -339,16 +339,16 @@ tas(volatile slock_t *lock)
register slock_t _res; register slock_t _res;
__asm__ __volatile__( __asm__ __volatile__(
"ldq $0, %0;" "ldq $0, %0 \n"
"bne $0, 2f;" "bne $0, 2f \n"
"ldq_l %1, %0;" "ldq_l %1, %0 \n"
"bne %1, 2f;" "bne %1, 2f \n"
"mov 1, $0;" "mov 1, $0 \n"
"stq_c $0, %0;" "stq_c $0, %0 \n"
"beq $0, 2f;" "beq $0, 2f \n"
"mb;" "mb \n"
"br 3f;" "br 3f \n"
"2: mov 1, %1;" "2: mov 1, %1 \n"
"3:" "3:"
: "=m"(*lock), "=r"(_res) : "=m"(*lock), "=r"(_res)
: :
......
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