Commit 1b4998fd authored by Robert Haas's avatar Robert Haas

Further corrections from the department of redundancy department.

Thom Brown
parent e01e66f8
...@@ -125,7 +125,7 @@ we get a disk layout like this: ...@@ -125,7 +125,7 @@ we get a disk layout like this:
where the numbers are page numbers *at that level*, starting from 0. where the numbers are page numbers *at that level*, starting from 0.
To find the physical block # corresponding to leaf page n, we need to To find the physical block # corresponding to leaf page n, we need to
count the number number of leaf and upper-level pages preceding page n. count the number of leaf and upper-level pages preceding page n.
This turns out to be This turns out to be
y = n + (n / F + 1) + (n / F^2 + 1) + ... + 1 y = n + (n / F + 1) + (n / F^2 + 1) + ... + 1
......
...@@ -1009,7 +1009,7 @@ LogAccessExclusiveLockPrepare(void) ...@@ -1009,7 +1009,7 @@ LogAccessExclusiveLockPrepare(void)
* RecordTransactionAbort() do not optimise away the transaction * RecordTransactionAbort() do not optimise away the transaction
* completion record which recovery relies upon to release locks. It's a * completion record which recovery relies upon to release locks. It's a
* hack, but for a corner case not worth adding code for into the main * hack, but for a corner case not worth adding code for into the main
* commit path. Second, must must assign an xid before the lock is * commit path. Second, we must assign an xid before the lock is
* recorded in shared memory, otherwise a concurrently executing * recorded in shared memory, otherwise a concurrently executing
* GetRunningTransactionLocks() might see a lock associated with an * GetRunningTransactionLocks() might see a lock associated with an
* InvalidTransactionId which we later assert cannot happen. * InvalidTransactionId which we later assert cannot happen.
......
...@@ -128,7 +128,7 @@ And the reader can do this: ...@@ -128,7 +128,7 @@ And the reader can do this:
On machines with strong memory ordering, these weaker barriers will simply On machines with strong memory ordering, these weaker barriers will simply
prevent compiler rearrangement, without emitting any actual machine code. prevent compiler rearrangement, without emitting any actual machine code.
On machines with weak memory ordering, they will will prevent compiler On machines with weak memory ordering, they will prevent compiler
reordering and also emit whatever hardware barrier may be required. Even reordering and also emit whatever hardware barrier may be required. Even
on machines with weak memory ordering, a read or write barrier may be able on machines with weak memory ordering, a read or write barrier may be able
to use a less expensive instruction than a full barrier. to use a less expensive instruction than a full barrier.
......
Markdown is supported
0% or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment