New ASM format:

/*
 * Standard __asm__ format:
 *
 *  __asm__(
 *          "command;"
 *          "command;"
 *          "command;"
 *      :   "=r"(_res)          return value, in register
 *      :   "r"(lock)           argument, 'lock pointer', in register
 *      :   "r0");              inline code uses this register
 */

src/include/storage/s_lock.h

@@ -9,7 +9,7 @@
  *
  *
  * IDENTIFICATION
- *	  $Header: /cvsroot/pgsql/src/include/storage/s_lock.h,v 1.78 2001/01/18 23:40:26 momjian Exp $
+ *	  $Header: /cvsroot/pgsql/src/include/storage/s_lock.h,v 1.79 2001/01/19 02:58:59 momjian Exp $
  *
  *-------------------------------------------------------------------------
  */
@@ -48,10 +48,8 @@
  *		unsigned	spins = 0;
  *
  *		while (TAS(lock))
- *		{
  *			S_LOCK_SLEEP(lock, spins++);
  *	}
- *	}
  *
  *	where S_LOCK_SLEEP() checks for timeout and sleeps for a short
  *	interval.  Callers that want to perform useful work while waiting
@@ -101,6 +99,18 @@ extern void s_lock_sleep(unsigned spins, int microsec,
  * All the gcc inlines
  */
 
+/*
+ * Standard __asm__ format:
+ *
+ *	__asm__(
+ *			"command;"
+ *			"command;"
+ *			"command;"
+ *		:	"=r"(_res)			return value, in register
+ *		:	"r"(lock)			argument, 'lock pointer', in register
+ *		:	"r0");				inline code uses this register
+ */
+
 
 #if defined(__i386__)
 #define TAS(lock) tas(lock)
@@ -110,7 +120,11 @@ tas(volatile slock_t *lock)
 {
 	register slock_t _res = 1;
 
-__asm__("lock; xchgb %0,%1": "=q"(_res), "=m"(*lock):"0"(_res));
+	__asm__(
+			"lock;"
+			"xchgb %0,%1;"
+:			"=q"(_res), "=m"(*lock)
+:			"0"(_res));
 	return (int) _res;
 }
 
@@ -121,18 +135,19 @@ __asm__("lock; xchgb %0,%1": "=q"(_res), "=m"(*lock):"0"(_res));
 #define TAS(lock) tas(lock)
 
 static __inline__ int
-tas (volatile slock_t *lock)
+tas(volatile slock_t *lock)
 {
 	long int	ret;
 
 	__asm__		__volatile__(
-       "xchg4 %0=%1,%2"
+										 "xchg4 %0=%1,%2;"
 							 :			 "=r"(ret), "=m"(*lock)
 							 :			 "r"(1), "1"(*lock)
 							 :			 "memory");
 
 	return (int) ret;
 }
+
 #endif	 /* __ia64__ */
 
 
@@ -144,7 +159,10 @@ tas(volatile slock_t *lock)
 {
 	register slock_t _res = 1;
 
-__asm__("swpb %0, %0, [%3]": "=r"(_res), "=m"(*lock):"0"(_res), "r" (lock));
+	__asm__(
+			"swpb %0, %0, [%3];"
+:			"=r"(_res), "=m"(*lock)
+:			"0"(_res), "r"(lock));
 	return (int) _res;
 }
 
@@ -161,17 +179,19 @@ tas(volatile slock_t *lock)
 {
 	int			_res;
 
-        __asm__ __volatile("    la    1,1\n"
-                           "    l     2,%2\n"
-                           "    slr   0,0\n"
-                           "    cs    0,1,0(2)\n"
-                           "    lr    %1,0"
-                           : "=m" (lock), "=d" (_res)
-                           : "m" (lock)
+	__asm__		__volatile(
+									   "la 1,1;"
+									   "l 2,%2;"
+									   "slr 0,0;"
+									   "cs 0,1,0(2);"
+									   "lr %1,0;"
+						   :		   "=m"(lock), "=d"(_res)
+						   :		   "m"(lock)
 						   :		   "0", "1", "2");
 
 	return (_res);
 }
+
 #endif	 /* __s390__ */
 
 
@@ -183,8 +203,9 @@ tas(volatile slock_t *lock)
 {
 	register slock_t _res = 1;
 
-	__asm__("ldstub [%2], %0" \
-:			"=r"(_res), "=m"(*lock) \
+	__asm__(
+			"ldstub [%2], %0;"
+:			"=r"(_res), "=m"(*lock)
 :			"r"(lock));
 	return (int) _res;
 }
@@ -200,11 +221,13 @@ tas(volatile slock_t *lock)
 {
 	register int rv;
 
-	__asm__ __volatile__ (
-		"tas %1; sne %0"
-		: "=d" (rv), "=m"(*lock)
-		: "1" (*lock)
-		: "cc" );
+	__asm__		__volatile__(
+										 "tas %1;"
+										 "sne %0;"
+							 :			 "=d"(rv), "=m"(*lock)
+							 :			 "1"(*lock)
+							 :			 "cc");
+
 	return rv;
 }
 
@@ -225,13 +248,14 @@ tas(volatile slock_t *lock)
 {
 	register	_res;
 
-	__asm__("	movl $1, r0 \
-			bbssi $0, (%1), 1f \
-			clrl r0 \
-1:			movl r0, %0 "
-:			"=r"(_res)			/* return value, in register */
-:			"r"(lock)			/* argument, 'lock pointer', in register */
-:			"r0");				/* inline code uses this register */
+	__asm__(
+			"movl $1, r0;"
+			"bbssi $0, (%1), 1f;"
+			"clrl r0;"
+			"1: movl r0, %0;"
+:			"=r"(_res)
+:			"r"(lock)
+:			"r0");
 	return (int) _res;
 }
 
@@ -245,9 +269,11 @@ static __inline__ int
 tas(volatile slock_t *lock)
 {
 	register	_res;
-  __asm__("sbitb 0, %0 \n\
-	sfsd %1"
-	: "=m"(*lock), "=r"(_res));
+
+	__asm__(
+			"sbitb 0, %0;"
+			"sfsd %1;"
+:			"=m"(*lock), "=r"(_res));
 	return (int) _res;
 }
 
@@ -268,7 +294,7 @@ asm int
 tas(volatile slock_t *s_lock)
 {
 /* UNIVEL wants %mem in column 1, so we don't pg_indent this file */
-%mem s_lock
+	%mem s_lock
 	pushl %ebx
 	movl s_lock, %ebx
 	movl $255, %eax
@@ -307,18 +333,21 @@ tas(volatile slock_t *lock)
 {
 	register slock_t _res;
 
-	__asm__ volatile
-("		ldq   $0, %0		\n\
-		bne   $0, 2f		\n\
-		ldq_l %1, %0		\n\
-		bne   %1, 2f		\n\
-		mov   1, $0			\n\
-		stq_c $0, %0		\n\
-		beq   $0, 2f		\n\
-		mb					\n\
-		br    3f			\n\
-	 2: mov   1, %1			\n\
-	 3:       \n" : "=m"(*lock), "=r"(_res) : : "0");
+	__asm__		volatile(
+									 "ldq   $0, %0;"
+									 "bne   $0, 2f;"
+									 "ldq_l %1, %0;"
+									 "bne   %1, 2f;"
+									 "mov   1, $0;"
+									 "stq_c $0, %0;"
+									 "beq   $0, 2f;"
+									 "mb;"
+									 "br 3f;"
+									 "2: mov   1, %1;"
+									 "3:"
+						 :			 "=m"(*lock), "=r"(_res)
+						 :
+						 :			 "0");
 
 	return (int) _res;
 }